Tools
In this page I am showing all the tools used for soldering, programming, debugging and analisys of data, mainly intended as interfaces to the hardware for software development.
In this page I am showing all the tools used for soldering, programming, debugging and analisys of data, mainly intended as interfaces to the hardware for software development.
NOTE: for the people who think that Chinese soldering equipment is "not professional" let me point-out that if you really know how to solder, this equipment is absolutely OK; of course if you are not able to do it, then you need tools that fill your gaps! Just for you reference, with those tools I can work down to fine-pitch DFN, 0201-sized passives and even 0.5mm pitch small BGA packages.
Small infrared benchtop oven for reflow soldering.
Custom firmware based on Unified Engineering work.
Customizable profiles for Lead-based and Leadfree solderpastes, IC and PCB baking.
Observation mode: Brightfield.
Heads: Binocular head, 45° inclined.
Interpupillary distance: Adjustable.
Dioptric adjustment: On the left eyepiece.
Eyepieces: WF 5x/10x/20x 20 mm, secured by screw.
Objective: Achromatic 1x with anti-fungus treatment.
Stand: Overhanging stand with focus.
Focusing: Rack and pinion controlled by a pair of knobs placed on both sides of the stand.
Illumination: Incident
The de-facto standard debug probe.
Supports: ARM7/9/11, Cortex-A5/A7/A8/A9, Cortex-M0/M1/M3/M4/M7, Cortex-R4, Microchip PIC32 and Renesas RX.
Download speed up to 1 MByte/second
Supports unlimited breakpoints in flash memory.
Supported by all major IDEs.
Remote Server included. GDBServer included.
Target interfaces: JTAG, SWD, SWV/SWO, ETB.
Target voltage range: 1.2V - 3.3V, 5V tolerant.
Small, complete, all-in-one JTAG programming/debugging solution for Xilinx FPGAs and SoCs.
Plugs directly into standard Xilinx JTAG header.
Separate Vref drives JTAG signal voltages; Vref can be any voltage between 1.8V and 5V.
High-Speed USB2 port that can drive JTAG bus up to 30Mbit/sec (frequency adjustable by user)
Compatible with Xilinx ISE® 14.1 and newer, Xilinx Vivado® 2013.3 and newer.
Open drain buffer on pin 14 allows debugging software to reset the processor core of Xilinx's Zynq® platform
Here you can find a list of all the main software I use for my development activities, being it EDA tools, IDEs, Operating Systems or other software that I consider relevant for my daily job. Normally the choice of which software to use is discussed and selected with the customer, according to its technical needs and the profitablity of the licensing models for each tool.
I use this Open Source EDA tool as my preferred choice for industrial and consumer projects, where the complexity of the design is low and there are no special needs for high-speed design rules. The advantage of this software package is that the design loop is extremely fast and the customer doesn't need to buy a specific licence to read and modify the sources.
Excellent EDA package for HDI, high-speed, high-count layer PCB, and very complex designs with strict DFM rules. The design loop is longer that simpler tools but the results are optimum. Most customers and third-party manufactureres already have this tool in house, hence the frequent request to use this EDA package for easier data exchange and portability.
Little brother of the Altium Designer package, it has the same project management tools and methods with a simpler user interface. The design loop is similar to Altium Designer and it can use Altium Vault as the main library. Project files, schematics and libraries are fully compatible with Designer, while the PCB files can be imported/exported from/to Designer easily. It is a good option for customers who cannot afford another Altium Designer license but want me to work with Altium tools.
Concurrent hardware and firmware editing, compiling and debugging.
Supports: PSoC 3, PSoC 4, PSoC 4 BLE, PRoC BLE, PSoC 5LP, PSoC6 and FM0+.
Over 120 pre-verified, production-ready Components.
Custom components in Verilog or via state machine diagram.
Dynamically generated API libraries.
Integrated Raisonance C/ASM/Linker toolsets.
Supports: ARM, STM8/ST7, CoolRISC and Cortus-APS3.
CodeCompressor for post-link code size optimization.
RBuilder for peripheral configuration and automatic gerneration of code.
Project manager that facilitates complex activities (bank switching, flash, multi-processor, multi-module,...).
Integrated simulator.
Supports: Spartan-6, Virtex-6, and CoolRunner devices, and previous families.
Includes Xilinx Platform Studio (XPS), Software Development Kit (SDK).
IP including MicroBlaze Soft Processor and peripherals.
Complete RTL to bit stream design flow.
High-Level Synthesis, Partial Reconfiguration, ChipScope.
Supports 7-series family.
Spartan7, Artix7, and Zynq7000 platforms.
IP includes MicroBlaze Soft Processor and periphrals.
Graphical and block-based design to full synthesis and bitstream with automatic connection solver.
Includes full Eclipse-based IDE with SDK for MicroBlaze and ARM Cortex-A9 in Zynq7000 devices.